? semiconductor components industries, llc, 2003 march, 2003 - rev. 2 1 publication order number: ncv4276/d ncv4276 advance information low-drop voltage regulator this industry standard linear regulator has the capability to drive loads up to 400 ma at 5.0 v, 3.3 v, 2.5 v and 1.8 v, and is also available in an adjustable version. package options include dpak, d 2 pak, and to-220. this device is pin-for-pin compatible with the infineon part number tle4276. features ? 5.0 v, 3.3 v, 2.5 v, 1.8 v, or adjustable, 4%, 400 ma output voltage ? 500 mv (max) dropout voltage ? inhibit input ? very low current consumption ? fault protection ? +45 v peak transient voltage ? -42 v reverse voltage ? short circuit ? thermal overload ? ncv prefix for automotive and other applications requiring site and change control - + i inh q gnd current limit and saturation sense bandgap reference thermal shutdown figure 1. block diagram error amplifier va adjustable version only 5 v version only this document contains information on a new product. specifications and information herein are subject to change without notice. http://onsemi.com http://onsemi.com d 2 pak 5-pin dp suffix case 936a-02 1 5 dpak 5-pin dt suffix case tbd pin 1. i 2. inh 3. gnd 4. nc/va 5. q to-220 five lead tq suffix case 314d 1 5 1 5 to-220 five lead tqva suffix case 314n see general marking information in the device marking section on page 5 of this data sheet. device marking information see detailed ordering and shipping information in the package dimensions section on page 6 of this data sheet. ordering information
ncv4276 confidential and proprietary not for public release http://onsemi.com 2 maximum ratings*2 rating min max unit input [i (dc)] -42 45 v input [i (peak transient voltage)] - tbd v inhibit inh -42 45 v voltage adjust input va -0.3 10 v output (q) -1.0 40 v ground (gnd) - 100 ma operating range (i) q + 0.5 40 v operating range (i), adjustable device, q < 4.0 v 4.5 40 v esd susceptibility (human body model) 2.0 - kv junction temperature -40 150 c storage t emperature -50 150 c package thermal resistance, dpak, 5-pin : junction-to-case, r q jc junction-to-ambient, r q ja - - tbd tbd c/w c/w package thermal resistance, d 2 pak, 5-pin : junction-to-case, r q jc junction-to-ambient, r q ja - - tbd tbd c/w c/w package thermal resistance, to-220, 5-lead: junction-to-case, r q jc junction-to-ambient, r q ja - - tbd tbd c/w c/w lead temperature soldering reflow (smd styles only) note 1 wave solder (through hole styles only) note 2 - - 240 peak (note 3) 260 peak c c 1. 10 seconds max. 2. 60 seconds max above 183 c. 3. -5 c/+0 c allowable conditions. *the maximum package power dissipation must be observed. 2during the voltage range which exceeds the maximum tested voltage of i, operation is assured, but not specified. wider limits may appl y. thermal dissipation must be observed closely. electrical characteristics (i = 13.5 v; -40 c < t j < 150 c; unless otherwise noted) characteristic test conditions min typ max unit output output voltage, 5.0 v v ersion 5.0 ma < i q < 400 ma, 6.0 v < v i < 28 v 4.8 5.0 5.2 v output voltage, 5.0 v v ersion 5.0 ma < i q < 200 ma, 6.0 v < v i < 40 v 4.8 5.0 5.2 v output voltage, 3.3 v v ersion 5.0 ma < i q < 400 ma, 6.0 v < v i < 28 v 3.168 3.300 3.432 v output voltage, 3.3 v v ersion 5.0 ma < i q < 200 ma, 6.0 v < v i < 40 v 3.168 3.300 3.432 v output voltage, 2.5 v v ersion 5.0 ma < i q < 400 ma, 6.0 v < v i < 28 v 2.4 2.5 2.6 v output voltage, 2.5 v v ersion 5.0 ma < i q < 200 ma, 6.0 v < v i < 40 v 2.4 2.5 2.6 v output voltage, 1.8 v v ersion 5.0 ma < i q < 400 ma, 6.0 v < v i < 28 v 1.728 1.800 1.872 v output voltage, 1.8 v v ersion 5.0 ma < i q < 200 ma, 6.0 v < v i < 40 v 1.728 1.800 1.872 v output voltage t olerance, adjustable version r2 < 50 k, q + 1.0 v < i < 40 v, i > 4.5 v, 5.0 ma < i q < 400 ma -4.0 - 4.0 % output current limitation (note 4) - 400 600 1100 ma output current limitation (sleep mode) i q = i i - i q inh = 0 v, t j < 100 c - - 10 m a quiescent current, i q = i i - i q i q = 1.0 ma - 100 220 m a quiescent current, i q = i i - i q i q = 250 ma - 5.0 10 ma
ncv4276 confidential and proprietary not for public release http://onsemi.com 3 electrical characteristics (continued) (i = 13.5 v; -40 c < t j < 150 c; unless otherwise noted) characteristic unit max typ min test conditions output (continued) quiescent current, i q = i i - i q i q = 400 ma - 15 25 ma dropout voltage (note 3), 5.0 v version 3.3 v version 2.5 v version 1.8 v version i q = 250 ma, v dr = v i - v q - - - - 250 - - - 500 1.2 2.0 2.7 mv v v v electrical characteristics (continued) (i = 13.5 v; -40 c < t j < 150 c; unless otherwise noted) characteristic test conditions min typ max unit output dropout voltage (note 4), adjustable version i q = 250 ma, i > 4.5 v, v dr = v i - v q - 250 500 mv load regulation i q = 5.0 ma to 400 ma - 5.0 35 mv line regulation d v = 12 v to 32 v, i q = 5.0 ma - 15 25 mv power supply ripple rejection f r = 100 hz, v r = 0.5 v pp - 54 - db temperature output voltage drift - - 0.5 - mv/k inhibit inhibit on voltage q > 4.9 v - 2.0 3.5 v inhibit off voltage q < 1.0 v 0.5 1.7 - v input current inh = 5.0 v 5.0 10 20 m a 4. measured when the output voltage v q has dropped 100 mv from the nominal value obtained at v i = 13.5 v. pin description pin no. symbol description ???? ???? 1 ?????? ?????? i ???????????????????????? ???????????????????????? input; battery supply input voltage. ???? ???? 2 ?????? ?????? inh ???????????????????????? ???????????????????????? inhibit; low-active input. ???? ???? 3 ?????? ?????? gnd ???????????????????????? ???????????????????????? ground; pin 3 internally connected to heatsink. ???? ? ??? ???? 4 ?????? ????? ? ?????? nc/va ???????????????????????? ? ?????????????????????? ? ???????????????????????? not connected for fixed voltage versions. voltage adjust input; only for adjustable version. connect an external voltage driver to set the output voltage. ???? ???? 5 ?????? ?????? q ???????????????????????? ???????????????????????? output; 4.0%, 400 ma output. use 22 m f, esr > 3.0 w at 10 khz to ground. input c i1 100 m f c i2 100 nf i i i inh 1 2 5 4 3 gnd c q * i q q va r1* output figure 2. measuring circuit ncv4276 r2* r l * 22 m f for adjustable and 5v v ersions. 10 m f for 3.3 v, 2.5 v, and 1.8 v v ersions. i inh circuit description the error amplifier compares a temperature stable reference voltage to a voltage that is proportional to the output voltage (q) (generated from a resistor divider) and drives the base of a series transistor via a buffer. saturation control as a function of the load current prevents any oversaturation of the output power device preventing excessive substrate current (quiescent current).
ncv4276 confidential and proprietary not for public release http://onsemi.com 4 setting the output voltage (adjustable version) the output voltage range of the adjustable version can be set between 2.5 v and 20 v (figure 4). this is accomplished with an external resistor divider feeding back the voltage to the ic back to the error amplifier by the voltage adjust pin va. the internal reference voltage is set to a temperature stable reference voltage of 2.5 v. the output voltage is calculated from the following formula. ignoring the bias current into the va pin, q [(r1 r2) v ref ] r2 use r2 < 50 k to avoid significant output voltage errors due to va bias current. connecting va directly to q without r1 and r2 creates an output voltage of 2.5 v. designers should consider the tolerance of r1 and r2 during the design phase. the input voltage range for operation (pin i) of the adjustable version is between (q + 0.5 v) and 40 v. internal bias requirements dictate a minimum input voltage of 4.3 v. the dropout voltage for output voltages less than 4 v is (4.3 v - q). calculating power dissipation in a single output linear regulator the maximum power dissipation for a single output regulator (figure 3) is: p d(max) [v in(max) v out(min) ]i out(max) (1) v in(max) i q where v in(max) is the maximum input voltage, v out(min) is the minimum output voltage, i out(max) is the maximum output current for the application, i q is the quiescent current the regulator consumes at i out(max) . once the value of p d(max) is known, the maximum permissible value of r q ja can be calculated: r ja 150 c t a p d (2) the value of r q ja can then be compared with those in the package section of the data sheet. those packages with r q ja 's less than the calculated value in equation 2 will keep the die temperature below 150 c. in some cases, none of the packages will be sufficient to dissipate the heat generated by the ic, and an external heatsink will be required. smart regulator ? iq control features i out i in figure 3. single output regulator with key performance parameters labeled v in v out } heat sinks a heat sink effectively increases the surface area of the package to improve the flow of heat away from the ic and into the surrounding air. each material in the heat flow path between the ic and the outside environment will have a thermal resistance. like series electrical resistances, these resistances are summed to determine the value of r q ja : r ja r jc r cs r sa (3) where r q jc is the junction-to-case thermal resistance, r q cs is the case-to-heatsink thermal resistance, r q sa is the heatsink-to-ambient thermal resistance. r q jc appears in the package section of the data sheet. like r q ja , it too is a function of package type. r q cs and r q sa are functions of the package type, heatsink and the interface between them. these values appear in heat sink data sheets of heat sink manufacturers.
ncv4276 confidential and proprietary not for public release http://onsemi.com 5 c q 22 m f q va r1 v out figure 4. adjustable version application setup r2 - + current limit and saturation sense v ref = 2.5 v marking diagrams d 2 pak dp suffix case 936a-02 dpak dt suffix case tbd to-220 tq suffix case 314d to-220 tqva suffix case 314n xxx... = specific device code a = assembly location wl, l = wafer lot yy, y = year ww, w = work week xx xxxxxxxxx awlyww xxxxxxx awlyyww 1 xx xxxxxxxxx awlyww 1 1 xxxxxxx awlyyww 1
ncv4276 confidential and proprietary not for public release http://onsemi.com 6 ordering information device output voltage package shipping ncv4276dtadj dpak 5 pin xx units/rail ncv4276dtadjrk dpak, 5-pin xxx t ape & reel ncv4276dpadj adjustable d 2 pak 5 pin 50 units/rail ncv4276dpadjr5 adjustable d 2 pak, 5-pin 750 tape & reel ncv4276tq5adj to-220, 5-lead, straight 50 units/rail ncv4276tqva5adj to-220, 5-lead, vertical 50 units/rail ncv4276dt50 dpak 5 pin xx units/rail ncv4276dt50rk dpak, 5-pin xxx t ape & reel ncv4276dp50 50v d 2 pak 5 pin 50 units/rail ncv4276dp50r5 5.0 v d 2 pak, 5-pin 750 tape & reel ncv4276tq50 to-220, 5-lead, straight 50 units/rail ncv4276tqva50 to-220, 5-lead, vertical 50 units/rail ncv4276dt33 dpak 5 pin xx units/rail ncv4276dt33rk dpak, 5-pin xxx t ape & reel ncv4276dp33 33v d 2 pak 5 pin 50 units/rail ncv4276dp33r5 3.3 v d 2 pak, 5-pin 750 tape & reel ncv4276tq33 to-220, 5-lead, straight 50 units/rail ncv4276tqva33 to-220, 5-lead, vertical 50 units/rail ncv4276dt25 dpak 5 pin xx units/rail ncv4276dt25rk dpak, 5-pin xxx t ape & reel NCV4276DP25 25v d 2 pak 5 pin 50 units/rail NCV4276DP25r5 2.5 v d 2 pak, 5-pin 750 tape & reel ncv4276tq25 to-220, 5-lead, straight 50 units/rail ncv4276tqva25 to-220, 5-lead, vertical 50 units/rail ncv4276dt18 dpak 5 pin xx units/rail ncv4276dt18rk dpak, 5-pin xxx t ape & reel ncv4276dp18 18v d 2 pak 5 pin 50 units/rail ncv4276dp18r5 1.8 v d 2 pak, 5-pin 750 tape & reel ncv4276tq18 to-220, 5-lead, straight 50 units/rail ncv4276tqva18 to-220, 5-lead, vertical 50 units/rail
ncv4276 confidential and proprietary not for public release http://onsemi.com 7 package dimensions dpak, 5-pin dt suffix case tbd issue tbd case 936a-02 issue b d pak 5 ref a 123 k b s h d g c e m l p n r v u terminal 6 notes: 1. dimensioning and tolerancing per ansi y14.5m, 1982. 2. controlling dimension: inch. 3. tab contour optional within dimensions a and k. 4. dimensions u and v establish a minimum mounting surface for terminal 6. 5. dimensions a and b do not include mold flash or gate protrusions. mold flash and gate protrusions not to exceed 0.025 (0.635) maximum. dim a min max min max millimeters 0.386 0.403 9.804 10.236 inches b 0.356 0.368 9.042 9.347 c 0.170 0.180 4.318 4.572 d 0.026 0.036 0.660 0.914 e 0.045 0.055 1.143 1.397 g 0.067 bsc 1.702 bsc h 0.539 0.579 13.691 14.707 k 0.050 ref 1.270 ref l 0.000 0.010 0.000 0.254 m 0.088 0.102 2.235 2.591 n 0.018 0.026 0.457 0.660 p 0.058 0.078 1.473 1.981 r 5 ref s 0.116 ref 2.946 ref u 0.200 min 5.080 min v 0.250 min 6.350 min 45 m 0.010 (0.254) t -t- optional chamfer 2
ncv4276 confidential and proprietary not for public release http://onsemi.com 8 package dimensions to-220 five lead t suffix case 314d-04 issue e -q- 12345 u k d g a b 5 pl j h l e c m q m 0.356 (0.014) t seating plane -t- dim min max min max millimeters inches a 0.572 0.613 14.529 15.570 b 0.390 0.415 9.906 10.541 c 0.170 0.180 4.318 4.572 d 0.025 0.038 0.635 0.965 e 0.048 0.055 1.219 1.397 g 0.067 bsc 1.702 bsc h 0.087 0.112 2.210 2.845 j 0.015 0.025 0.381 0.635 k 0.990 1.045 25.146 26.543 l 0.320 0.365 8.128 9.271 q 0.140 0.153 3.556 3.886 u 0.105 0.117 2.667 2.972 notes: 1. dimensioning and tolerancing per ansi y14.5m, 1982. 2. controlling dimension: inch. 3. dimension d does not include interconnect bar (dambar) protrusion. dimension d including protrusion shall not exceed 10.92 (0.043) maximum. to-220 five lead tfva suffix case 314n-01 issue o notes: 1. dimensioning and tolerancing per ansi y14.5m, 1982. 2. controlling dimension: inch. 3. dimension d does not include interconnect bar (dambar) protrusion. dimension d including protrusion shall not exceed 10.92 (0.043) maximum. 4. leads maintain a right angle with respect to the package body to within 0.015 ". dim a min max min max millimeters 0.604 0.614 15.34 15.60 inches b 0.395 0.405 10.03 10.29 c 0.175 0.185 4.44 4.70 d 0.027 0.037 0.69 0.94 e 0.100 0.110 2.54 2.79 f 0.712 0.727 18.08 18.47 g 0.067 bsc 1.70 bsc h 0.020 0.030 0.51 0.76 j 0.014 0.022 0.36 0.56 k 0.889 0.904 22.58 22.96 l 0.324 0.339 8.23 8.61 m 0.115 0.130 2.92 3.30 n 0.115 0.125 2.92 3.17 -t- seating plane m s e c k f d 5 pl m q m 0.356 (0.014) t g u b -q- h a n 12345 l j r w q 0.120 0.130 3.05 3.30 r 0.292 0.342 7.42 8.69 s 0.133 0.183 3.38 4.65 u 0.480 0.495 12.19 12.57 w 5 5
ncv4276 confidential and proprietary not for public release http://onsemi.com 9 notes
ncv4276 confidential and proprietary not for public release http://onsemi.com 10 on semiconductor and are registered trademarks of semiconductor components industries, llc (scillc). scillc reserves the right to mak e changes without further notice to any products herein. scillc makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does scillc assume any liability arising out of the application or use of any product or circuit, and s pecifically disclaims any and all liability, including without limitation special, consequential or incidental damages. typicalo parameters which may be provid ed in scillc data sheets and/or specifications can and do vary in different applications and actual performance may vary over time. all operating parameters, including typicalso must be validated for each customer application by customer's technical experts. scillc does not convey any license under its patent rights nor the rights of others. scillc products are not designed, intended, or authorized for use as components in systems intended for surgical implant into t he body, or other applications intended to support or sustain life, or for any other application in which the failure of the scillc product could create a sit uation where personal injury or death may occur. should buyer purchase or use scillc products for any such unintended or unauthorized application, buyer shall indem nify and hold scillc and its officers, employees, subsidiaries, affiliates, and distributors harmless against all claims, costs, damages, and expenses, and reasonable attorney fees arising out of, directly or indirectly, any claim of personal injury or death associated with such unintended or unauthorized u se, even if such claim alleges that scillc was negligent regarding the design or manufacture of the part. scillc is an equal opportunity/affirmative action employ er. publication ordering information japan : on semiconductor, japan customer focus center 2-9-1 kamimeguro, meguro-ku, tokyo, japan 153-0051 phone : 81-3-5773-3850 on semiconductor website : http://onsemi.com for additional information, please contact your local sales representative. ncv4276/d literature fulfillment : literature distribution center for on semiconductor p.o. box 5163, denver, colorado 80217 usa phone : 303-675-2175 or 800-344-3860 toll free usa/canada fax : 303-675-2176 or 800-344-3867 toll free usa/canada email : onlit@hibbertco.com n. american technical support : 800-282-9855 toll free usa/canada
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